A Case Study in Specifying and Testing Architectural Features
| dc.contributor.author | Krishnan, Padmanabhan | |
| dc.date.accessioned | 2018-01-04T02:44:12Z | |
| dc.date.available | 2018-01-04T02:44:12Z | |
| dc.date.issued | 1993 | en |
| dc.description.abstract | This paper studies the speci cation and testing of two main architectural features. We consider restricted forms of instruction pipelining and parallel memory models present in the SPARC speci cation. The feasibility of using an automatic tool, the concurrency work bench, has been demonstrated. | en |
| dc.identifier.uri | http://hdl.handle.net/10092/14917 | |
| dc.identifier.uri | http://dx.doi.org/10.26021/2267 | |
| dc.language | English | |
| dc.language.iso | en | |
| dc.publisher | University of Canterbury | en |
| dc.rights | All Right Reserved | en |
| dc.rights.uri | https://canterbury.libguides.com/rights/theses | en |
| dc.title | A Case Study in Specifying and Testing Architectural Features | en |
| dc.type | Theses / Dissertations | en |
| thesis.degree.grantor | University of Canterbury | en |
| thesis.degree.level | Doctoral | en |
| thesis.degree.name | Other | en |
| uc.college | Faculty of Engineering | en |