A performance study of the Acorn RISC machine

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dc.contributor.authorJaggar, David Vivianen
dc.date.accessioned2014-07-24T02:55:29Z
dc.date.available2014-07-24T02:55:29Z
dc.date.issued1990en
dc.description.abstractThe design decisions behind the development of the Acorn RISC Machine (ARM) are investigated, by implementing the architecture with a software emulator, to record the effectiveness of the unusual architectural features that make the ARM architecture unique. The adaption of an existing compiler construction tool (the Amsterdam Compiler Kit) has demonstrated that an optimising compiler can exploit the RISC architecture to maximize CPU performance. By compiling high level language algorithms, a complete picture of the effectiveness of the ARM architecture to support high performance computing is formed.en
dc.identifier.urihttp://hdl.handle.net/10092/9405
dc.identifier.urihttp://dx.doi.org/10.26021/2065
dc.language.isoen
dc.publisherUniversity of Canterbury. Computer Scienceen
dc.relation.isreferencedbyNZCUen
dc.rightsCopyright David Vivian Jaggaren
dc.rights.urihttps://canterbury.libguides.com/rights/thesesen
dc.titleA performance study of the Acorn RISC machineen
dc.typeTheses / Dissertations
thesis.degree.disciplineComputer Science
thesis.degree.grantorUniversity of Canterburyen
thesis.degree.levelMastersen
thesis.degree.nameMaster of Scienceen
uc.bibnumber336755
uc.collegeFaculty of Engineeringen
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