The design of a multiplier for use in an electronic analogue computer.
Thesis DisciplineElectrical Engineering
Degree GrantorUniversity of Canterbury
Degree NameMaster of Engineering
It was intended when the year began to examine the different methods of electronic analogue multiplication, to choose a method and to endeavour to make a multiplier using the chosen method. Should a successful multiplier be constructed and sufficient time remain in the year, the multiplier would be used to solve some differential equations in conjunction with the rest of the analogue computer. During the course of the year no great difficulties were encountered and a multiplier meeting specifications was built. In fact a unit comprising two multipliers was built as it was found that two multipliers would fit into a moderate space and certain sections could be used for both multipliers. With two multipliers operating the analogue computer was used as a differential analyser to investigate sane differential equations requiring multipliers for their solution. Among those investigated were the well-known equations of van der Pol and Legendre. The existence of known solutions to both of these equations served as a. useful check on the accuracy of the working of the computer. The thesis will be found to consist of four chapters. After the present chapter, there is a survey of the methods for doing electronic multiplication. Chapter three deals in more detail with one of the methods and the design of a multiplier is considered using this method. Finally, chapter four describes the solution or several differential equations using the multipliers constructed according to the design in Chapter three.