Scaled-down modelling and microprocessor facilities for the simulation and assessment on HVDC convertor disturbances.
Thesis DisciplineElectrical Engineering
Degree GrantorUniversity of Canterbury
Degree NameDoctor of Philosophy
Aimed at the eventual implementation of direct digital control and protection in a.c./d.c. power systems, this thesis describes the design of a thyristor convertor model and an interrupt-driven multiple microprocessor system capable of simulating various faults encountered in real systems, and of monitoring the normal and abnormal convertor operating states in real time. Recent developments of HVDC convertor control and operation are first reviewed, and a fast and reliable method of deriving convertor-valve ON/OFF states is practically implemented in the model and assessed for other applications. A comprehensive set of normal and abnormal convertor waveforms is derived and used as a basis for the software-based fault simulation and fault-data acquisition scheme. The proposed scheme takes full advantage of the versatile and cost-effective general-purpose microprocessor to provide sophisticated convertor operating-state monitoring, fault data recording and immediate display on the inter-connected VDU terminal. In conjunction with the fault simulation scheme, the conditions for fast shut-down of the convertor upon the occurrence of certain disturbances are investigated.