FPGA Implementation of a Real Time Maximum Likelihood Space-Time Decoder on a MIMO Software Radio Test Platform
Type of content
Conference Contributions - Published
UC permalink
Publisher's DOI/URI
Thesis discipline
Degree name
Publisher
University of Canterbury. Electrical and Computer Engineering
Journal Title
Journal ISSN
Volume Title
Language
Date
2010
Authors
Green, P.J.
Taylor, D.P.
Abstract
This paper describes the concept, architecture, development and demonstration of a real time, maximum likelihood Alamouti decoder for a wireless 4-transmit 4-receiver multiple input and multiple output (MIMO) Smart Antenna Software Radio Test System (SASRATS) platform. It is implemented on a Xilinx Virtex 2 Pro Field Programmable Gate Array (FPGA). Hardware, firmware, use of the Xilinx Core Generator Intellectual Property modules and experimental verification of the decoder are discussed.
Description
Citation
Green, P.J., Taylor, D.P. (2010) FPGA Implementation of a Real Time Maximum Likelihood Space-Time Decoder on a MIMO Software Radio Test Platform. Ho Chi Minh City, Vietnam: 5th International Symposium on Electronic Design, Test and Applications (DELTA 2010), 13-15 Jan 2010. 139-143.
Keywords
real-time implementation, Alamouti, FPGA, maximum likelihood decoder, MIMO, software radio test platform
Ngā upoko tukutuku/Māori subject headings
ANZSRC fields of research
Field of Research::09 - Engineering::0906 - Electrical and Electronic Engineering
Field of Research::08 - Information and Computing Sciences::0803 - Computer Software
Field of Research::08 - Information and Computing Sciences::0803 - Computer Software