Receiver design for OFDM transmission with insufficient cyclic prefix.
Thesis DisciplineElectrical Engineering
Degree GrantorUniversity of Canterbury
Degree NameDoctor of Philosophy
Orthogonal frequency division multiplexing (OFDM) is desirable for broad-band communication because of its high spectral efficiency and resistance to multipath fading. The latter is achieved by adding a cyclic prefix to the beginning of each OFDM symbol. The cyclic prefix length must be equal to or greater than the channel delay spread to avoid multipath interference. For long range transmission, this criterion leads to bandwidth inefficiency. If a shorter cyclic prefix is used, the interference caused corrupts both pilot and data sub-carriers leading to degradation in channel estimation and data detection. This thesis focuses on developing effective receiver designs for multiple antenna orthogonal frequency division multiplexing systems when the cyclic prefix is insufficient. Closed form expressions for the short cyclic prefix induced interference are formulated and analyzed. Based on the analysis, we propose an iterative structure for channel estimation and data detection using a limited number of pilot sub-carriers. First, the number of channel paths is estimated from the channel least squares estimates at the pilot sub-carriers. We then formulate a maximum likelihood process to approximate the channel delay profile and subsequently the individual path coefficients. A search procedure is designed to reduce the estimator's complexity. High performance trellis based equalization schemes are proposed. Two additional data detection methods based on the zero forcing and minimum mean square error criteria are introduced with lower complexity than the trellis equalizers at the cost of performance. Simulation results indicate that the proposed techniques outperform conventional receivers, especially when the trellis equalizer is utilized for data detection. The mean square error of the channel estimate converges to the Cramer-Rao bound after two iterations; and the achieved bit error rate can reach that of the sufficient cyclic prefix case even when the delay spread is significantly longer than the cyclic prefix.